Parallel signal accumulators occasionally fall out of sync

endlesshappiness's icon

I'm trying to make an ongoing count off of different subdivisions of a phasor and am running into a problem where they occasionally fall out of sync timing-wise, seemingly unpredictably. This occasionally happens when I turn off and on audio, if I connect other msp objects or reset the signal accumulator object by sending it a bang. I have a simple example here. I've tried a lot of different things, including resetting the phase of the phasor before resetting the signal accumulators but more or less get the same effect.

Does anyone know why the signal accumulators fall out of sync here or can suggest an alternate approach to avoid this? I don't get the same behavior if I remove the signal accumulators and just trigger the click~ objects with what~ and edge~, but I'm really hoping to be able to keep a global count from different subdivisions for sequencing.

Thanks in advance!

Max Patch
Copy patch and select New From Clipboard in Max.

endlesshappiness's icon

I'm not sure if this helps at all, but here's a visualization of what's happening. Setting the signal accumulators to 0 will make the trigger events offset. I think one of the signal accumulators is maybe getting an impulse after I reset the count to 0, causing them to fall out of sync. But nothing I've tried so far is able to prevent that from happening.

Roman Thilenius's icon

such problems often might be caused because subdiv~ (or the good old rate~) are not really doing what people think, they are not "fully automatic" and it is kind of normal that things break in certain "unsupported situations".

if you want to be on the safe side you should try using arithmetics only and making everything dependend on a single master phasor.

but i see something else here, which you should try first. it is admittedly a very theoretic problem, but the bang is happening on the main thread. this way, under high CPU performance, it can come late when it goes to a signal vector inside an object.
if overdrive is turned on and you move it to scheduler thread, this will not be the case.

solution #3 could be the creation of a custom signal accumulator patch which will replace the +=~.

endlesshappiness's icon

Thanks Roman, I appreciate your help and the insight about subdiv & rate. I had a feeling there might be some side effect or latency from those objects. I'll also look into the scheduler thread (still totally foreign to me). For now I followed your advice and went with arithmetic off one phaser and got really good results from that. Thanks again!